Methods of base formation in a BiCMOS process
US7390721B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2005 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Aug 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/401
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.