Method of forming a MOS transistor
US7396717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2006 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Apr 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the halo implanted region, for obtaining a good junction profile and improving short channel effect. The implant comprises carbon, a hydrocarbon, or a derivative of the hydrocarbon, such as one selected from a group consisting of C, Chd xHy+, and (CxHy)n+, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of 1 to 1000.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.