Patent · US Active

Memory element, memory read-out element and memory cell

US7400526B2 · kind B2 · utility

2Cited by

3References

33Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Tim Schoenauer · Peising, DE
Michael Kund · Bad Aibling, DE
Thomas Niedermeier · Rosenheim, DE
Joerg Berthold · Munich, DE

Key dates

Filing date	Jun 28, 2006
Grant date	Jul 15, 2008
Priority date	—
Expiry date	Dec 20, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C2213/74
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory element comprises a resistance element having a first resistance value in a first state and a second resistance value in a second state, it being possible to convert the resistance element from the first state into the second state and from the second state into the first state and the first resistance value and the second resistance value being different, a current generating device, coupled to a first terminal of the resistance element, the current generating device being designed to generate a current with a first amplitude through the resistance element when a predetermined potential is present at a second terminal of the resistance element, in order to convert the resistance element into the first state for setting the first resistance value, or to generate a current with a second amplitude through the resistance element when the predetermined potential is present at the second terminal of the resistance element, in order to convert the resistance element into the second state for setting the second resistance value, the first resistance value representing a first memory state and the second resistance value representing a second memory state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.