Memory with dynamically adjustable supply
US7403426B2 · kind B2 · utility
27Cited by
11References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 25, 2005 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | May 25, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a memory array is provided with cells that when written to or read from, can have modified supplies to enhance their read stability and/or write margin performance. Other embodiments may be disclosed and/or claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.