Switching to original code comparison of modifiable code for translated code validity when frequency of detecting memory overwrites exceeds threshold
US7404181B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2006 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Aug 21, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of translating instructions from a target instruction set to a host instruction set. In one embodiment, a plurality of first target instructions is translated into a plurality of first host instructions. After the translation, it is determined whether the plurality of first target instructions has changed. A copy of a second plurality of target instructions is stored and compared with the plurality of first target instructions if the determining slows the operation of the computer system. After comparing, the plurality of first host instructions is invalidated if there is a mismatch. According to one embodiment, the storing, the comparing and the invaliding is initiated when the determining indicates that a page contains at least one change to the plurality of first target instructions. In one embodiment, the determining is by examining a bit indicator associated with a memory location of the plurality of first target instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.