Robert Bedichek
15Patents
8h-index
17Co-inventors
69Inventor score
Filing activity: May 7, 1987 → Mar 9, 2010
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5905855A | Method and apparatus for correcting errors in computer systems | Physics | 101 | Expired |
| US6594821B1 | Translation consistency checking for modified target instructions by comparing to original copy | Physics | 80 | Expired |
| US6415379B1 | Method and apparatus for maintaining context while executing translated instructions | Physics | 51 | Expired |
| US4803622A | Programmable I/O sequencer for use in an I/O processor | Physics | 32 | Expired |
| US7096460B1 | Switching to original modifiable instruction copy comparison check to validate prior translation when translated sub-area protection exception slows down operation | Physics | 24 | Expired |
| US7404181B1 | Switching to original code comparison of modifiable code for translated code validity when frequency of detecting memory overwrites exceeds threshold | Physics | 18 | Active |
| US6990658B1 | Method for translating instructions in a speculative microprocessor featuring committing state | Physics | 12 | Expired |
| US6845353B1 | Interpage prologue to protect virtual address mappings | Physics | 10 | Expired |
| US7761857B1 | Method for switching between interpretation and dynamic translation in a processor system based upon code sequence execution counts | Physics | 7 | Expired |
| US7904891B2 | Checking for instruction invariance to execute previously obtained translation code by comparing instruction to a copy stored when write operation to the memory portion occur | Physics | 2 | Active |
| US7617088B1 | Interpage prologue to protect virtual address mappings | Physics | 1 | Active |
| US8418153B2 | Method for integration of interpretation and translation in a microprocessor | Physics | 0 | Active |
| US9875103B2 | Translating instructions in a speculative processor | Physics | 0 | Active |
| US6871342B1 | Method for translating instructions in a speculative microprocessor featuring committing state | General | 0 | Revoked |
| US7694113B1 | Method for translating instructions in a speculative microprocessor | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.