Flash memory with high-K dielectric material between substrate and gate
US7414281B1 · kind B1 · utility
531Cited by
9References
4Claims
0Family size
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Key dates
| Filing date | Sep 9, 2003 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Mar 16, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
Abstract
A flash memory cell and a method of forming the same are described. The flash memory cell may include a substrate having a source and a drain, a gate element, and a dielectric layer between the substrate and the gate element. The dielectric layer includes a dielectric material having a dielectric constant that is greater than that of silicon dioxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.