Patent · US Expired

Re-driving CAwD and rD signal lines

US7414917B2 · kind B2 · utility

69Cited by

7References

9Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Hermann Ruckerbauer · Radolfzell, DE
Simon Muff · Mering, DE
Christian Weiss · Birkenfeld, DE
Peter Gregorius · Munich, DE

Key dates

Filing date	Jul 29, 2005
Grant date	Aug 19, 2008
Priority date	—
Expiry date	Nov 12, 2025

Classification

Technology area (CPC H)Electricity
CPC primaryH05K1/142
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Semiconductor memory modules and semiconductor memory systems using the same are described herein. The modules divide a conventional DIMM into a series of separate, smaller memory modules. Each memory module includes at least one semiconductor memory chip arranged on a substrate; CAwD signal input lines arranged on the substrate in a first predetermined line number and connecting one of the semiconductor memory chips to CAwD input signal pins on the substrate; and rD signal output lines arranged on the substrate in a second predetermined line number and connecting the one or a last semiconductor memory to a second number of rD output signal pins of the substrate. In a semiconductor memory system including the semiconductor memory modules, each memory module is separately connected to a memory controller by the CAwD signal input lines and the rD signal output lines in a respective point-to-point fashion.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.