Method of patterning a low-k dielectric using a hard mask
US7416992B2 · kind B2 · utility
4Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2005 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Aug 30, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/952
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By using a non-metallic hard mask for patterning low-k dielectric materials of advanced semiconductor devices, an enhanced degree of etch fidelity is obtained. The present invention may readily be applied to via first-trench last, trench first-via last schemes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.