Processor having content addressable memory with command ordering
US7418543B2 · kind B2 · utility
7Cited by
60References
25Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 21, 2004 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Aug 2, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content addressable memory (CAM) includes a linked list structure for a pending queue to order memory commands for maximizing memory channel bandwidth by minimizing read/write stalls due to read-modify-write commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.