Memory structure and method of manufacture

US7423282B2 · kind B2 · utility

Assignees

• Infineon Technologies AG · DE
• Atlis Semiconductor · FR

Inventors

• Chanro Park · Clifton Park, US
• Wolfgang Raberg · Sauerlach, DE
• Ulrich Klostermann · Fontainebleau, FR

Key dates

• Filing date: Jul 6, 2006
• Grant date: Sep 9, 2008
• Expiry date: Jul 6, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

A solid state electrolyte memory structure includes a solid state electrolyte layer, a metal layer on the solid state electrolyte layer, and an etch stop layer on the metal layer.