Sense circuit for resistive memory
US7426134B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2006 |
| Grant date | Sep 16, 2008 |
| Priority date | — |
| Expiry date | Oct 30, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory includes a phase-change memory cell and a circuit. The phase-change memory cell can be set to at least three different states including a substantially crystalline state, a substantially amorphous state, and at least one partially crystalline and partially amorphous state. The circuit applies a first voltage across the memory cell to determine whether the memory cell is set at the substantially crystalline state and applies a second voltage across the memory cell to determine whether the memory cell is set at a partially crystalline and partially amorphous state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.