Patent · US Active

Circuit arrangement and method for driving electronic chips

US7426669B2 · kind B2 · utility

0Cited by

3References

16Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Bjorn Flach · Munich, DE
Andreas Logisch · Hersbruck, DE
Wolfgang Ruf · Friedberg, DE
Michael Schittenhelm · Poing, DE
Martin Schnell · Berlin, DE

Key dates

Filing date	Oct 14, 2004
Grant date	Sep 16, 2008
Priority date	—
Expiry date	Oct 4, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/4402
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention provides a method for testing circuit units to be tested in a test apparatus, different identification units being assigned to the circuit units to be tested, the circuit units to be tested being connected to the test apparatus, a tester data stream including command blocks being output from the test apparatus, the tester data stream being compared with the identification units, the circuit unit to be tested, the identification unit of which matches the tester data stream output by the test apparatus, being activated and at least one command block for this circuit unit to be tested being processed in the circuit unit to be tested, whereupon the circuit unit to be tested is deactivated.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.