Method and memory circuit for operating a resistive memory cell
US7428163B2 · kind B2 · utility
6Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2006 |
| Grant date | Sep 23, 2008 |
| Priority date | — |
| Expiry date | Jul 21, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for reading a memory datum from a resistive memory cell comprising a selection transistor which is addressable via a control value, the method comprising detecting a cell current flowing through the resistive memory cell, setting the control value depending on the detected cell current, and providing an information associated to the control value as a memory datum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.