Patent · US Expired

Testing a data store using an external test unit for generating test sequence and receiving compressed test results

US7428662B2 · kind B2 · utility

3Cited by

15References

11Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Alexander Benedix · Hersbruck, DE
Reinhard Düregger · Poing, DE
Robert Hermann · Chula Vista, US
Wolfgang Ruf · Friedberg, DE

Key dates

Filing date	May 15, 2002
Grant date	Sep 23, 2008
Priority date	—
Expiry date	Mar 25, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/48
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Disclosed is a test method for testing a data store having an integrated test data compression circuit where the data store has a memory cell array with a multiplicity of addressable memory cells, read/write amplifiers for reading and writing data to the memory cell via an internal data bus in the data store and a test data compression circuit which compresses test data sequences, which are each read serially from the memory cell array, with stored reference test data sequences in order to produce a respective indicator data item which indicates whether at least one data error has occurred in the test data sequence which has been read.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.