Silicon oxynitride gate dielectric formation using multiple annealing steps
US7429540B2 · kind B2 · utility
21Cited by
13References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 3, 2006 |
| Grant date | Sep 30, 2008 |
| Priority date | — |
| Expiry date | Apr 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02329
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for processing a semiconductor substrate in a chamber includes forming a silicon oxynitride film using a two-step anneal process. The first anneal step includes annealing the silicon oxynitride film in the presence of an oxidizing gas that has a partial pressure of about 1 to about 100 mTorr, and the second anneal step includes annealing the silicon oxynitride film with oxygen gas that has a flow rate of about 1 slm. The first anneal step is performed at a higher chamber temperature and higher chamber pressure than the second anneal step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.