Metal gate CMOS with at least a single gate metal and dual gate dielectrics

US7432567B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Bruce B. Doris · Brewster, US
• Young-Hee Kim · Potsdam, US
• Barry P. Linder · Hastings-on-Hudson, US
• Vijay Narayanan · New York, US
• Vamsi K. Paruchuri · New York, US

Key dates

• Filing date: Dec 28, 2005
• Grant date: Oct 7, 2008
• Expiry date: Jul 5, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/01

Abstract

A complementary metal oxide semiconductor (CMOS) structure including at least one nFET and at least one pFET located on a surface of a semiconductor substrate is provided. In accordance with the present invention, the nFET and the pFET both include at least a single gate metal and the nFET gate stack is engineered to have a gate dielectric stack having no net negative charge and the pFET gate stack is engineered to have a gate dielectric stack having no net positive charge. In particularly, the present invention provides a CMOS structure in which the nFET gate stack is engineered to include a band edge workfunction and the pFET gate stack is engineered to have a ¼ gap workfunction. In one embodiment of the present invention, the first gate dielectric stack includes a first high k dielectric and an alkaline earth metal-containing layer or a rare earth metal-containing layer, while the second high k gate dielectric stack comprises a second high k dielectric.