Accelerated single-ended sensing for a memory circuit
US7433254B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2006 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Apr 24, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single-ended sensing circuit is provided for use with a memory circuit including a plurality of bit lines and a plurality of memory cells connected to the bit lines. The sensing circuit includes at least one charge sharing circuit and at least one switching circuit connected to the charge sharing circuit. The switching circuit is operative to selectively connect the charge sharing circuit to at least a given one of the bit lines as a function of a first control signal supplied to the switching circuit. The sensing circuit further includes at least one comparator circuit connected to the given bit line. The comparator circuit is operative to generate an output signal indicative of a logical state of a memory cell connected to the given bit line. The charge sharing circuit is operative to remove an amount of charge on the given bit line so as to reduce a voltage on the given bit line in conjunction with a read access of the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.