Method and test device for determining a repair solution for a memory module
US7437627B2 · kind B2 · utility
3Cited by
9References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 20, 2004 |
| Grant date | Oct 14, 2008 |
| Priority date | — |
| Expiry date | Dec 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5606
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method for determining a repair solution for a memory module in a test system, memory areas of the memory module being successively tested in order to obtain, for each memory area, a defect datum which specifies whether the respective memory area is defective, wherein defect addresses, the address values of which specify the defective memory areas of the memory module, are generated from addresses of the memory areas and the associated defect data, the defect addresses being stored in the test system, the repair solution being determined from the stored defect addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.