Programming non-volatile memory with improved boosting
US7440326B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 6, 2006 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | Jan 16, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Non-volatile storage elements are programmed in a manner that reduces program disturb, particularly at the edges storage elements strings, by using modified pass voltages. In particular, during the programming of a selected storage element, an isolation voltage is applied to a storage element proximate to the selected storage element thereby electrically dividing the channel associated with the storage elements into two isolated areas. Additional isolated areas are formed remotely from the selected storage element by applying the isolation voltage to other remote storage elements. The isolated channel regions associated with the storage elements are then boosted with different pass voltages in order to alleviate the effects of program disturb. Thus, a standard pass voltage is applied to storage elements immediately adjacent to the selected storage element, and a lower pass voltage is applied to storage elements remote from the selected storage element. In one preferred embodiment, a higher pass voltage is applied to storage elements immediately adjacent the selected storage element on the side having previously programmed storage elements. These techniques reduce the leakage of cha…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.