Phasing for a multi-threaded network processor
US7441245B2 · kind B2 · utility
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8References
26Claims
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Key dates
| Filing date | Aug 14, 2003 |
| Grant date | Oct 21, 2008 |
| Priority date | — |
| Expiry date | Mar 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of and apparatus for associating units of data with threads of a multi-threaded processor for processing, and enabling each thread to perform processing for at least two of the data units during a thread execution period. The thread execution period is divided among phases, and each of the data units processed by a thread is processed by a different one of the phases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.