Methods of manufacturing semiconductor structures using RIE process
US7442650B2 · kind B2 · utility
2Cited by
6References
1Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 10, 2007 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Jan 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio during plasma generation and etching. Plasma generation is induced by a source radio frequency and anisotropic etch performance is induced by a second bias radio frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.