Peter Biolsi
10Patents
4h-index
27Co-inventors
60Inventor score
Filing activity: Mar 14, 2000 → Apr 15, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6677678B2 | Damascene structure using a sacrificial conductive layer | Electricity | 79 | Expired |
| US7030031B2 | Method for forming damascene structure utilizing planarizing material coupled with diffusion barrier material | Electricity | 53 | Expired |
| US6444557B1 | Method of forming a damascene structure using a sacrificial conductive layer | Electricity | 10 | Expired |
| US7045464B1 | Via reactive ion etching process | Electricity | 6 | Expired |
| US7214608B2 | Interlevel dielectric layer and metal layer sealing | Electricity | 3 | Expired |
| US7442650B2 | Methods of manufacturing semiconductor structures using RIE process | Electricity | 2 | Active |
| US8532796B2 | Contact processing using multi-input/multi-output (MIMO) models | Electricity | 1 | Active |
| US12266533B2 | Sacrificial capping layer for contact etch | Electricity | 0 | Active |
| US12300500B2 | Etching of polycrystalline semiconductors | Electricity | 0 | Active |
| US8614150B2 | Methods of manufacturing semiconductor structures using RIE process | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.