Self-biasing transistor structure and an SRAM cell having less than six transistors
US7442971B2 · kind B2 · utility
126Cited by
9References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2005 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Oct 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/637
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
By providing a self-biasing semiconductor switch, an SRAM cell having a reduced number of individual active components may be realized. In particular embodiments, the self-biasing semiconductor device may be provided in the form of a double channel field effect transistor that allows the formation of an SRAM cell with less than six transistor elements and, in preferred embodiments, with as few as two individual transistor elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.