Inventor · Dresden, DE

Manfred Horstmann

84Patents
15h-index
38Co-inventors
84Inventor score

Filing activity: Feb 5, 1999 → Feb 26, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US7442971B2 Self-biasing transistor structure and an SRAM cell having less than six transistors Electricity 126 Expired
US6881641B2 Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same Electricity 125 Expired
US7297994B2 Semiconductor device having a retrograde dopant profile in a channel region Electricity 118 Active
US6274894A Low-bandgap source and drain formation for short-channel MOS transistors Electricity 114 Expired
US6255703A Device with lower LDD resistance Electricity 47 Expired
US6838363B2 Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material Electricity 28 Expired
US6566718B2 Field effect transistor with an improved gate contact and method of fabricating the same Electricity 26 Expired
US6133124A Device improvement by source to drain resistance lowering through undersilicidation Electricity 24 Expired
US7399663B2 Embedded strain layer in thin SOI transistors and a method of forming the same Electricity 23 Active
US6352885B1 Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same Emerging Cross-Sectional Technologies 19 Expired
US6242776A Device improvement by lowering LDD resistance with new silicide process Electricity 19 Expired
US7741167B2 Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Electricity 18 Active
US7060549B1 SRAM devices utilizing tensile-stressed strain films and methods for fabricating the same Electricity 17 Expired
US7579262B2 Different embedded strain layers in PMOS and NMOS transistors and a method of forming the same Electricity 16 Active
US7329571B2 Technique for providing multiple stress sources in NMOS and PMOS transistors Electricity 15 Active
US6218250A Method and apparatus for minimizing parasitic resistance of semiconductor devices Electricity 14 Expired
US7906383B2 Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device Electricity 13 Active
US7659213B2 Transistor having an embedded tensile strain layer with reduced offset to the gate electrode and a method for forming the same Electricity 13 Active
US7547610B2 Method of making a semiconductor device comprising isolation trenches inducing different types of strain Electricity 12 Active
US7208397B2 Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same Electricity 12 Expired
US6541863B1 Semiconductor device having a reduced signal processing time and a method of fabricating the same Electricity 11 Expired
US6207563A Low-leakage CoSi2-processing by high temperature thermal processing Electricity 10 Expired
US6344397B1 Semiconductor device having a gate electrode with enhanced electrical characteristics Electricity 10 Expired
US7217657B2 Semiconductor device having different metal silicide portions and method for fabricating the semiconductor device Electricity 9 Expired
US6821887B2 Method of forming a metal silicide gate in a standard MOS process sequence Electricity 9 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.