Patent · US Active

Integrated semiconductor memory and method for operating a semiconductor memory

US7443713B2 · kind B2 · utility

1Cited by

5References

22Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Stephan Schröder · Birkenfeld, DE
Herbert Benzinger · Birkenfeld, DE
Georg Eggers · Birkenfeld, DE
Manfred Proll · Dorfen, DE
Jorg Kliewer · Birkenfeld, DE

Key dates

Filing date	Jan 13, 2006
Grant date	Oct 28, 2008
Priority date	—
Expiry date	Aug 27, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH10B12/482
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated semiconductor memory device includes at least one memory cell, at least one sense amplifier and a pair of bit lines connected to each sense amplifier, where each memory cell includes a selection transistor and a storage capacitor. The storage capacitor of each memory cell includes a first capacitor electrode and a second capacitor electrode, and the selection transistor of each memory cell includes a first source/drain region that is connected by a first contact connection to one bit line of a pair of bit lines corresponding with the memory cell, and a second source/drain region that is conductively connected to the first capacitor electrode of the storage capacitor of the memory cell. The second capacitor electrode of the storage capacitor of each memory cell is connected to the other bit line of the pair of bit lines corresponding with the memory cell.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.