Semiconductor integrated device
US7443721B2 · kind B2 · utility
24Cited by
7References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2006 |
| Grant date | Oct 28, 2008 |
| Priority date | — |
| Expiry date | Nov 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor non volatile memory device capable of multiple write operations with high reliability includes memory cells. Each memory cell of the device has a first electrode, a second electrode, and an information storage section between the two electrodes. A segregation of composing elements of the information storage section caused by applying a first current pulse from the first electrode to the second electrode is corrected by applying a second current pulse from the second electrode to the first electrode such that the composition of the storage section recovers to its original state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.