Hybrid SOI-bulk semiconductor transistors

US7452761B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huilong Zhu · Poughkeepsie, US
• Philip J. Oldiges · Lagrangeville, US
• Bruce B. Doris · Brewster, US
• Xinlin Wang · Irvine, US
• Oleg Gluschenkov · Poughkeepsie, US
• Huajie Chen · Danbury, US
• Ying Zhang · Santa Clara, US

Key dates

• Filing date: Oct 11, 2007
• Grant date: Nov 18, 2008
• Expiry date: Oct 11, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/116

Abstract

Channel depth in a field effect transistor is limited by an intra-layer structure including a discontinuous film or layer formed within a layer or substrate of semiconductor material. Channel depth can thus be controlled much in the manner of SOI or UT-SOI technology but with less expensive substrates and greater flexibility of channel depth control while avoiding floating body effects characteristic of SOI technology. The profile or cross-sectional shape of the discontinuous film may be controlled to an ogee or staircase shape to improve short channel effects and reduce source/drain and extension resistance without increase of capacitance. Materials for the discontinuous film may also be chosen to impose stress on the transistor channel from within the substrate or layer and provide increased levels of such stress to increase carrier mobility. Carrier mobility may be increased in combination with other meritorious effects.