Semiconductor nano-wire devices and methods of fabrication
US7452778B2 · kind B2 · utility
86Cited by
61References
21Claims
0Family size
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Key dates
| Filing date | Apr 12, 2005 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | Nov 14, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Nano-wires, preferably of less than 20 nm diameter, can be formed with minimized risk of narrowing and breaking that results from silicon atom migration during an annealing process step. This is accomplished by masking portion of the active layer where silicon atomer would otherwise agglomerate with a material such as silicon dioxide, silicon nitride, or other dielectric that eliminates or substantially reduces the silicon atom migration. Nano-wires, nanotubes, nano-rods, and other features can be formed and can optionally be incorporated into devices, such as by use as a channel region in a transistor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.