Electrical open/short contact alignment structure for active region vs. gate region
US7453272B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2006 |
| Grant date | Nov 18, 2008 |
| Priority date | — |
| Expiry date | Mar 2, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for measuring alignment of polysilicon shapes relative to a silicon area wherein the presence of an electrical coupling is used to determine the presence of bias or misalignment. Bridging vertices on the polysilicon shapes are formed. Bridging vertices over the silicon area create low resistance connections between those bridging vertices and the silicon area; other bridging vertices over ROX (recessed oxide) areas do not create low resistance connections between those other bridging vertices and the silicon area. Determining which bridging vertices have low resistance connections to the silicon area and how many bridging vertices have low resistance connections to the silicon area are used to determine the bias and misalignment of the polysilicon shapes relative to the silicon area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.