Method of manufacturing silicide layer for semiconductor device
US7456096B2 · kind B2 · utility
4Cited by
6References
6Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 11, 2006 |
| Grant date | Nov 25, 2008 |
| Priority date | — |
| Expiry date | Feb 23, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2 layer through annealing; forming a Ni layer on the NiSi2 layer; and silicidating the NiSi2 layer through annealing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.