Semiconductor memory device
US7459748B2 · kind B2 · utility
11Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2006 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Oct 16, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes: a semiconductor substrate; a semiconductor layer formed on the semiconductor substrate with an insulating film interposed therebetween, the semiconductor layer being in contact with the semiconductor substrate via an opening formed in the insulating film; and a NAND cell unit formed on the semiconductor layer with a plurality of electrically rewritable and non-volatile memory cells connected in series and first and second select gate transistors disposed at both ends thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.