Lead frame structure having blocking surfaces and semiconductor package integrated with the lead frame structure
US7459770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2006 |
| Grant date | Dec 2, 2008 |
| Priority date | — |
| Expiry date | Nov 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame structure is provided, which includes a die pad having a first mounting portion and a second mounting portion separated from the first mounting portion by a gap. The first and second mounting portions are formed with corresponding blocking surfaces bordering the gap, so as to allow a flow rate of an encapsulating resin flowing through the gap during a molding process to be reduced by the blocking surfaces, such that different portions of the encapsulating resin respectively flowing above, in and below the die pad can have substantially the same flow rate, thereby preventing bonding wires from being deformed to cause short circuit and avoiding formation of voids. A semiconductor package with the lead frame structure is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.