CAM expected address search testmode
US7464308B2 · kind B2 · utility
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12References
21Claims
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Assignee
Inventor
Key dates
| Filing date | Jan 13, 2004 |
| Grant date | Dec 9, 2008 |
| Priority date | — |
| Expiry date | Sep 7, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A CAM device that performs operations on-chip during testing. The CAM device can, for example, include circuitry that compares search results with an expected address to determine whether the expected address is defective. The CAM can be tested by applying search data and the expected address to the CAM at the same time, and determining if a match occurs at the expected address. In another approach, a reset match enable is used to limit the search to only a CAM memory location that has been written to, thereby limiting the test search to only the location containing test data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.