Method of fabricating a silicon nitride stack
US7465669B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2005 |
| Grant date | Dec 16, 2008 |
| Priority date | — |
| Expiry date | Jan 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02211
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of methods for fabricating a silicon nitride stack on a semiconductor substrate are provided herein. In one embodiment, a method for fabricating a silicon nitride stack on a semiconductor substrate includes depositing a base layer including silicon nitride on the substrate using a first set of process conditions that selectively control the stress of the base layer; and depositing an upper layer including silicon nitride using a second set of process conditions that selectively control at least one of an oxidation resistance and a refractive index of the upper layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.