Memory accessing circuit system
US7466603B2 · kind B2 · utility
20Cited by
120References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 2, 2007 |
| Grant date | Dec 16, 2008 |
| Priority date | — |
| Expiry date | Oct 2, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A configurable memory system and method is wherein an integrated circuit coupled to a memory device includes application logic and memory interface logic in communication with the application logic, the memory interface logic configured to access a memory array within the memory device. The memory interface logic provides logic functions and/or signals that would have been provided by logic on a prior art memory device. The interface logic may access the memory device synchronously or asynchronously. The integrated circuit may communicate to the memory device using multiplexed or non-multiplexed signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.