Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits
US7468899B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2007 |
| Grant date | Dec 23, 2008 |
| Priority date | — |
| Expiry date | Jan 9, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for wafer level fabrication of high value inductors directly on top of semiconductor integrated circuits is disclosed. The integrated circuit includes a plurality of regulator circuits, each of the regulator circuits having an input node configured to receive a plurality of pulsed input signals having a predetermined duty cycle and a plurality of inductor windings associated with each of the plurality of regulator circuits respectively. The integrated circuit also includes a core array having a plurality of core elements. The plurality of core elements are positioned adjacent to and magnetically coupled with one or more of the plurality of inductor windings. An output node is electrically coupled to the plurality of inductor windings. The output signal at the output node is the sum of the instantaneous voltage on each of the inductor windings associated with the plurality of regulator circuits respectively. The integrated circuit also includes a phase control circuit coupled to the plurality of regulator circuits. The phase control circuit controls the phase of the plurality of pulsed input signals received at the plurality of the regulator circuits to contr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.