Method of polishing semiconductor wafers by using double-sided polisher
US7470169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2001 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | Sep 25, 2022 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/16
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
During polishing of the semiconductor wafer by using a double-sided polisher, a larger difference as compared to the prior art is created between a frictional resistance acting on a front surface of a silicon wafer from an upper surface plate side and a frictional resistance acting on a back surface of the silicon wafer from a lower surface plate side. Thereby, respective wafers can be rotated at as 0.1 - 1.0 rpm within corresponding wafer holding holes. Accordingly, the rotation of the wafer would not be suspended even if there were any defective condition induced during polishing. Further, partial variation or deviation in polishing volume particular in the outer periphery of the wafer would be hard to occur. Therefore, the polish-sagging is suppressed and thus the improved degree of flatness of the wafer could be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.