Insulated gate type semiconductor device and manufacturing method thereof
US7470953B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 6, 2004 |
| Grant date | Dec 30, 2008 |
| Priority date | — |
| Expiry date | May 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
The invention is intended to present an insulated gate type semiconductor device that can be manufactured easily and its manufacturing method while realizing both higher withstand voltage design and lower on-resistance design. The semiconductor device comprises N+ source region 31, N+ drain region 11, P− body region 41, and N− drift region 12. By excavating part of the upper side of the semiconductor device, a gate trench 21 is formed. The gate trench 21 incorporates the gate electrode 22. A P floating region 51 is provided beneath the gate trench 21. A further trench 35 differing in depth from the gate trench 21 may be formed, a P floating region 54 being provided beneath the trench 25.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.