Multi-gate FET with multi-layer channel
US7476930B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2007 |
| Grant date | Jan 13, 2009 |
| Priority date | — |
| Expiry date | Jul 5, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/791
Abstract
The invention concerns a field-effect transistor with a drain, a source, a channel in electrical contact with the source and the drain, and at least one gate, so as to apply an electric field to the channel when each gate is polarized, where the channel has a multi-layer structure with at least three layers, and with at least one of the layers of the multi-layer structure having electrical properties that are substantially different from those of another layer of the multi-layer structure, and wherein a single gate or two gates are arranged substantially perpendicular to a reference plane of the channel defined by an interface plane between two layers of the multi-layer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.