Method of manufacturing non-volatile memory cell
US7479426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2006 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | Feb 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
Abstract
A non-volatile memory cell includes a substrate, a first isolation structure positioned in a first region on the substrate, a second isolation structure surrounding a second region on the substrate, a control gate positioned on the first isolation structure in the first region, a first insulating layer positioned on the control gate, a second insulating layer positioned on the portion of the substrate in the second region, and a floating gate positioned on the first insulating layer and the second insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.