Semiconductor device and method of fabrication
US7479427B2 · kind B2 · utility
0Cited by
6References
5Claims
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Key dates
| Filing date | Sep 27, 2005 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | Apr 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/43
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device employs a SONOS type memory architecture and includes a bit line diffusion layer in a shallow trench groove in which a conductive film is buried. This makes it possible to decrease the resistivity of the bit line diffusion layer without enlarging the area on the main surface of the semiconductor substrate, and to fabricate the semiconductor memory device having stable electric characteristics without enlarging the cell area. The bit line is formed by implanting ions into the sidewall of Si3N4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.