Conditional synchronization mechanisms allowing multiple store operations to become visible while a flagged memory location is owned and remains unchanged
US7480771B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2006 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | Apr 10, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0846
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
We propose a class of mechanisms to support a new style of synchronization that offers simple and efficient solutions to several existing problems for which existing solutions are complicated, expensive, and/or otherwise inadequate. In general, the proposed mechanisms allow a program to read from a first memory location (called the “flagged” location), and to then continue execution, storing values to zero or more other memory locations such that these stores take effect (i.e., become visible in the memory system) only while the flagged memory location does not change. In some embodiments, the mechanisms further allow the program to determine when the first memory location has changed. We call the proposed mechanisms conditional multi-store synchronization mechanisms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.