Method and apparatus for refreshing programmable resistive memory
US7483316B2 · kind B2 · utility
1Cited by
113References
22Claims
0Family size
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Key dates
| Filing date | Jul 13, 2007 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Jul 13, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory cells with programmable resistive memory elements, such as chalcogenide material elements, undergo a refresh operation. A refresh operation includes a hot signal and a cold signal, where the hot signal has higher power than a reset signal, and a cold signal has a longer duration than a set signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.