Apparatus and method for adjusting an operating parameter of an integrated circuit
US7483327B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2006 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Jun 13, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for adjusting an operating parameter of an integrated circuit having a memory and logic, where the logic includes a timing circuit, includes accessing the memory, determining a relative speed of the memory access with respect to a speed of the timing circuit, and selectively adjusting the operating parameter based on the relative speed. In one embodiment, an integrated circuit may include a ring oscillator, a shift register having a clock input coupled to an output of the ring oscillator, and compare logic coupled to an output of the shift register. The shift register is enabled in response to initiating a memory access to a memory and disabled in response to completing the memory access. The compare logic provides a relative speed indicator representative of a relative speed of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.