Techniques for providing decoupling capacitance

US7488624B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Raymond R. Horton · Dover Plains, US
• John U. Knickerbocker · Wappingers Falls, US
• Edmund J. Sprogis · Underhill, US
• Cornelia K. Tsang · Potsdam, US

Key dates

• Filing date: Mar 27, 2008
• Grant date: Feb 10, 2009
• Expiry date: Mar 27, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15311
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.