Method of forming trench-gate electrode for FinFET device
US7488650B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 2005 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Dec 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
A FinFET device having a trench-gate electrode, and a method of manufacture, is provided. The trench-gate electrode may be fabricated by forming a mask layer on a substrate having a semiconductor layer, e.g., silicon, formed thereon. A trench is formed in the mask layer and fins are formed in the exposed region of the underlying semiconductor layer. A gate electrode may be formed in the trench by, for example, depositing a gate electrode material such that the trench is filled, planarizing the surface to the surface of the mask layer, and optionally forming a recess in the surface of the gate electrode. Spacers may be formed in the trench and an optional gate dielectric layer may be formed over the fins prior to depositing the gate electrode material. Raised source and drain regions may be used by using selective epitaxial growth processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.