Lead frame with included passive devices
US7489021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2004 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Feb 17, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/924
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An semiconductor device package (10) includes a semiconductor device (die) (12) and passive devices (14) electrically connected to a common lead frame (17). The lead frame (17) is formed from a stamped and/or etched metallic structure and includes a plurality of conductive leads (16) and a plurality of interposers (20). The passive devices (14) are electrically connected to the interposers (20), and I/O pads (22) on the die (12) are electrically connected to the leads (16). The die (12), passive devices (14), and lead frame (17) are encapsulated in a molding compound (28), which forms a package body (30). Bottom surfaces (38) of the leads (16) are exposed at a bottom face (34) of the package (10).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.