Bitcell with variable-conductance transfer gate and method thereof
US7489540B2 · kind B2 · utility
5Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 22, 2007 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Jul 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device comprises a bit cell comprising a bit storage device, a first word line, a second word line, and a first transfer gate to connect the bit storage device to a bit line. The first transfer gate is configurable to at least four conductance states based on a state of the first word line and a state of the second word line. The memory device further comprises control logic to configure, for an access to the bit cell, the state of the first word line and the state of the second word line based on an access type of the access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.