Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor

US7494872B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Karsten Wieczorek · Dresden, DE
• Thomas Feudel · Radebeul, DE
• Thorsten Kammler · Radeberg, DE
• Wolfgang Buchholtz · Radebeul, DE

Key dates

• Filing date: Mar 2, 2004
• Grant date: Feb 24, 2009
• Expiry date: Feb 16, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/027

Abstract

By forming an implantation mask prior to the definition of the drain and the source areas, an effective decoupling of the gate dopant concentration from that of the drain and source concentrations is achieved. Moreover, after removal of the implantation mask, the lateral dimension of the gate electrode may be defined by well-established sidewall spacer techniques, thereby providing a scaling advantage with respect to conventional approaches based on photolithography and anisotropic etching.